R-PODID at PEDC 2026 Prague

26-01-21 00:00

21–22 January 2026, Prague, Czech Republic – R-PODID was presented at the 2nd Pan-European Electronics Design Conference (PEDC), a two-day event featuring peer-reviewed presentations and expert panels delivering immediate, actionable techniques for electronics design, verification and production.

R-PODID was represented by Cristina Villegas Soriano of Silicon Austria Labs (SAL). She shared part of her ongoing research at SAL, carried out as part of the R-PODID project and directly related to her master’s thesis. Her presentation focused on the integration of pre-trained AI models on FPGA for real-time fault detection in power electronic systems and Hardware-in-the-Loop (HIL) validation.

The event provided an inspiring opportunity to exchange ideas with industry experts and to reflect on the growing role of AI in power electronics.

More information here: https://pedc.eu/pedc/